MOL Strip and Clean processes form the contacts to the transistor after implantation, before metallization layers are added. This includes selective removal of unreacted metallic films, such as Co, Ni or NiPt, after the formation of self-aligned silicide on the source, drain and polysilicon gate regions, as well as nitride spacer removal for optimization of strain enhancement and post contact-etch cleaning.
Benefits
- FSI's ViPR™ technology is proven to be the most effective process for selectively removing metal films from various dielectric surfaces.
- FSI's ViPR™ metal strip process enables the implementation of low temperature annealed NiPt salicide.
- FSI spray cleaning systems can be configured with both ViPR™ technology and the cleaning chemistries required for contact cleaning.
- FSI spray cleaning systems can be configured for both the metal strip and contact to minimize IC 'manufacturers' capital investments.
News
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FSI International Announces Expansion of ViPR™ All-Wet Stripping Technology into NAND Memory Manufacturing
- ORION®Single Wafer Cleaning System
- ZETA® Batch Spray System
- MERCURY® Semi-Auto Batch Spray System
- MAGELLAN® Batch Immersion System
All-wet photoresist stripping technology eliminates asher-induced defects.
MINNEAPOLIS (March 24, 2009) — FSI International, Inc. (Nasdaq: FSII) a leading supplier of wafer processing, cleaning and surface conditioning equipment for semiconductor manufacturing, announced today that a major memory manufacturer has extended the use of its ZETA® Cleaning System with proprietary ViPR™ all-wet, ashless cleaning technology to NAND production.
More
UMC Validates the ZETA® System ViPR™ Technology for NiPt Silicide Process on Silicon-Germanium (SiGe)
OTS (February 2009) -- At the recent FSI Knowledge Services™ Seminar Series in Asia, UMC presented compelling data using FSI’s ZETA® System ViPR™ process for the removal of unreacted metal in a nickel platinum (NiPt) self aligned silicide process on strained silicon germanium devices. UMC asserted that FSI’s ZETA® System ViPR™ technology is fully compatible with SiGe, and the technology has excellent selectivity and does not attack the low temp annealed silicides like chlorine based solutions. In addition, the ViPR™ technology one step process reduced overall cycle time compared to UMC’s existing double wet step process (Ni strip–anneal–Pt strip).
MoreFSI’s NEW ORION® Single Wafer Cleaning System Officially Takes Off
OTS (February 2009) -- On November 3, 2008, FSI officially entered the single wafer wet cleaning market with the ORION® System. In recent years IC manufacturers have been asking FSI for single wafer cleaning solutions -- FSI responded with the ORION® system. The ORION® system with its differentiated solutions is already providing unique critical path capabilities required for advanced technology nodes as reflected by orders received shortly after its launch.
MoreFSI International Announces the ZETA® Spray Cleaning System with ViPR™ Technology is Now Qualified for 200mm Manufacturing
ViPR™ technology eliminates ashing for highly implanted photoresist and improves yields for metal stripping following salicide processes
MINNEAPOLIS (December 9, 2008) — FSI International, Inc. (Nasdaq: FSII), a leading supplier of surface conditioning equipment for microelectronics manufacturing, announced today that its FSI ZETA® spray cleaning system with ViPR™ technology is now available for 200mm wafer processing, and an Asian customer has qualified this technology for their 200mm manufacturing.
MoreFSI International Releases ORION® Single Wafer Cleaning System
Innovative closed-chamber design enables critical path cleaning capabilities for ultra shallow junctions, high-k/metal gates and metal capping layers at 32nm and below.
MINNEAPOLIS (November 3, 2008) — FSI International, Inc. (Nasdaq: FSII) a leading supplier of wafer processing, cleaning and surface conditioning equipment for semiconductor manufacturing, announced today the release of its new ORION® Single Wafer Cleaning System.
MoreZETA® System Improves Cobalt Salicide Process Yields for Numonyx
OTS (September 2008) -- At FSI’s recent Knowledge Services™ Seminar series Enrico Bellandi described the success he and his colleagues at Numonyx had in reducing the defectivity and improving the yield of their cobalt salicide process using the ZETA® spray cleaning system. Reduction of contact and gate conductor resistance through self-aligned silicide formation, also known as “salicide,” is a well-known integrated circuit manufacturing module. A critical step in this module is the selective removal of unreacted metal after the silicide is formed by an annealing step. For flash memory manufacturing it is especially critical to remove any residual metal from the nitride spacer on the side of the gate stack.
MoreSTMicroelectronics Describes ZETA® System ViPR™ Process in Metal Stripping for Nickel Platinum Silicide
OTS (September 2008) -- At the recent FSI Knowledge Services™ Seminar series Stephane Zoll and Bruno Imbert of STMicroelectronics described challenges and solutions of metal stripping for nickel platinum (NiPt) salicide formation using a process based on FSI’s ZETA® System ViPR™ technology. The process leverages the FSI’s proprietary high temperature capabilities to strip unreacted NiPt with a sulfuric acid/hydrogen peroxide chemistry. This process is able to strip the unreacted Ni and residual Pt while avoiding the parasitic oxidation seen when chlorine based chemistries are used on NiPt silicides annealed at low temperatures. By enabling low temperature annealing, the new method solves a critical problem in the integration of NiPt silicides at the 45 nm technology node.
MoreApprecia Technology, Inc. presents at the Electronic Journal 186th Technical Symposium
OTS (September 2008) -- Apprecia Technology, Inc. presents at the Electronic Journal 186th Technical Symposium - Exhaustive Study for 2008 ULSI Surface Cleaning and Drying Technology - in Tokyo, August 28, 2008
Electronic Journal in Japan sponsors many technical symposia. Each year one of the symposia is focused on cleaning technology in IC manufacturing. In 2008, the focus of this symposium was on cleaning challenges for 45nm and 32nm technology generations.
MoreFSI Sponsors and Presents at the 2008 9th International Symposium on Ultra Clean Processing of Semiconductor Surfaces
OTS (September 2008) -- The Symposium on Ultra Clean Processing of Semiconductor Surfaces (UCPSS) objective is to increase the level of understanding on ultra-clean processing technology in all steps of IC-production.
The conference, which was held September 21-24 in Bruges, Belgium, included invited presentations as well as selected contributing presentations and posters.
MoreZETA® Spray Cleaning System’s ViPR™ Process for Metal Silicide Stripping Reduces Cost, Increases Throughput and Enables Low Temperature NiPtSi Anneal
OTS (February 2008) -- In parallel to the advancements made in ashless resist stripping using ZETA® system ViPR™ process, FSI now offers the HCl free ViPR™ process for metal silicide stripping (see FSI press release “FSI International Announces Breakthrough in Metal Stripping for Silicide Formation”). In collaboration with several customers, FSI has optimized the ViPR™ baseline process for rapid stripping of cobalt and nickel-platinum alloy metals used for salicide formation.
FSI Presents Advanced Cobalt Stripping Process for High Yield Salicide Formation
OTS (July 2006) -- At the conference, Dr. Charles Lin, FSI Asia director of product management, was pleased to present the paper Advanced Cobalt Stripping Process for High Yield Salicide Formation.
MoreFSI International Receives Multiple ZETA® Spray Cleaning System Orders with ViPR™ Technology for Wet Resist Stripping and Metal Film Etching after Salicide Formation
MINNEAPOLIS (April 15, 2008) -- FSI International, Inc. (Nasdaq: FSII), a leading manufacturer of wafer cleaning systems used in the fabrication of integrated circuits, announced today that it has received orders for its ZETA® spray cleaning systems with ViPR™ technology from customers in Korea, Japan and Europe. These purchases are from new users of FSI’s ViPR process and demonstrate the growing adoption of this innovative solution, driven by its ability to address critical advanced IC manufacturing cost and integration concerns during photoresist stripping and salicide formation. The systems are scheduled to ship in the third quarter of fiscal 2008.
MoreNAND Flash Driving Technology Roadmaps
OTS (February 2008) -- Jeff Butterbaugh, chief technologist for FSI International, focuses his “Hot Topic” article on NAND Flash technology and findings from a recent ITRS public conference during Semicon Japan.
FSI Presents the Advantages of Batch Spray Processing for Superior All-Wet Photoresist Stripping and Film Removal in China and Korea
OTS (February 2008) -- “Batch Spray processing for Superior Photoresist Stripping and Film Removal process” was presented at the August 2007 SI China Wafer Cleaning Seminar in Shanghai, China, by James Chu, FSI field application engineering manager for SE Asia and Great China; and at the September 2007, 6th Korean Surface Cleaning Users Group meeting in Seoul, Korea, by Andy Lee, FSI spray applications section manager.
MoreFSI International Announces Breakthrough in Metal Stripping for Silicide Formation
MINNEAPOLIS (December 11, 2007) -- FSI International, Inc. (Nasdaq: FSII) today announced it has adapted the FSI ViPR™ technology to successfully remove unreacted metal films after salicide formation. By implementing this new process, IC makers can achieve dramatic reductions in chemical usage and capital requirements for cobalt, nickel and nickel platinum silicide integration schemes. FSI ViPR™ technology is available on new FSI ZETA® Spray Cleaning System orders and as an upgrade to more recently installed systems in the field.
MoreITRS Timing Adjustments Affect New Surface Preparation Requirements
OTS (February 2007)
MoreIncreasing use of Silicon Nitride for IC Manufacturing Drives New Requirements for Wet Etching
OTS (November 2006) -- Jeffery W. Butterbaugh, FSI International Chief Technologist
While IC manufacturers continue to add new elements and materials to the production of advanced devices, they are also introducing variations and increasing the use of more standard materials like silicon nitride.
MoreStrain Engineering for Mobility Enhancement Drives Wet Processing Challenges
OTS (July 2006) -- Strain engineering for mobility enhancement has become one of the most important transistor fabrication techniques for keeping our industry on the “Moore’s Law” curve during this current era of “Scaling by Innovation”.
MoreFSI International Successfully Implements Its PlatNiStrip™ Process at Leading IC Makers for 65nm Production
MINNEAPOLIS (Feb. 7, 2006) -- FSI International, Inc. (Nasdaq: FSII) today announced that its nickel-platinum strip process, the PlatNiStrip™, has been qualified and implemented by several of the world’s largest IC makers for manufacturing 65nm technology devices. FSI’s PlatNiStrip process, designed to provide IC makers with a manufacturing solution for advanced salicide formation, is gaining broader industry adoption.
MoreFSI International Introduces New Cleaning Processes for Advanced Technology Nodes New Processes Meet Customer Needs Well Ahead of ITRS Schedule
MINNEAPOLIS (June 30, 2005) -- FSI International, Inc. (Nasdaq: FSII) today announced new cleaning processes to meet the needs of leading IC makers well ahead of the International Technology Roadmap for Semiconductors (ITRS) guidelines for material loss. The ITRS calls for a maximum material loss per cleaning cycle of 0.4 angstrom at the 45nm technology node, while semiconductor manufacturers indicate their requirements are closer to 0.1 angstrom.
MoreFSI International Announces New PlatNiStrip™ Process for Nickel Platinum Films; Development to Help IC Manufacturers Implement Salicide Formation at 65-nm
MINNEAPOLIS (Mar. 14, 2005) -- FSI International, Inc. (Nasdaq: FSII) today announced the development of a new nickel-platinum strip process designed to help IC manufacturers implement salicide formation at the 65-nm technology node. FSI has developed the PlatNiStrip™ process using the FSI ZETA® Spray Cleaning System and has partnered with leading IC makers to demonstrate the process on 65-nm pilot line devices. This low-cost process can be implemented with industry standard chemicals on a standard ZETA System.
MorePublications
“Advances on 45nm SiGe-Compatible NiPt Salicide Process”
By: Yi-Wei Chen, Nien-Ting Ho, Jerander Lai, T.C. Tsai, C.C. Huang, S. F. Tzou, UMC; and James. M. M. Chu, FSI International
NiPt self-aligned silicide (salicide) has become a major candidate for the 45nm node due to its better thermal stability and the surface morphology of NiSi on Si substrate.
Download PDF“Steam-Injected SPM Process for All-Wet Stripping of Implanted Photoresist”
By: David DeKraker, Blake Pasker, Jeffery W. Butterbaugh, Kurt K. Christenson, Thomas J. Wagener, FSI International
Photoresist stripping in IC manufacturing has become more challenging as the number of photoresist levels has increased while at the same time allowable material loss and surface damage has decreased.
Download English Version PDF Download Simplified Chinese Version PDF“New Technologies in Immersion Cleaning”
By: Weiping Ma, FSI International
Although immersion cleaning has been a mature technology for wafer cleaning for many years, there are still advancements made today, especially targeted for 90nm and below technology nodes. In this column, we will introduce some of FSI International’s innovations in immersion cleaning.
Download English Version PDF Download Simplified Chinese Version PDF“The Litmus Test ’Selective Etching of High-k Dielectric Films’”
By: Kurt Christenson
Download PDF"Strategies for Second-Hand Equipment in China"
While used equipment has been widely used in China and contributing to a strong advantage in low-cost manufacturing, the Chinese IC industry also needs technology upgrade to continue the rapid growth. Can 2nd hand equipment continue to be useful at the next nodes? We offer strategies and examples from our work with leading IC makers worldwide.
Download English Version PDF Download Simplified Chinese Version PDF“Selective Etching of High-k”
Solid State Technology Web Exclusive
The deposition of blanket films with a subsequent etch after gate patterning remains the leading candidate for integrating high-k gate dielectrics at the 70nm node.
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