OTS (February 2009) -- At the recent FSI Knowledge Services™ Seminar Series in Asia, UMC presented compelling data using FSI’s ZETA® System ViPR™ process for the removal of unreacted metal in a nickel platinum (NiPt) self aligned silicide process on strained silicon germanium devices. UMC asserted that FSI’s ZETA® System ViPR™ technology is fully compatible with SiGe, and the technology has excellent selectivity and does not attack the low temp annealed silicides like chlorine based solutions. In addition, the ViPR™ technology one step process reduced overall cycle time compared to UMC’s existing double wet step process (Ni strip–anneal–Pt strip).
The logic industry has migrated to adding platinum to their nickel silicides and to lower temperature first anneals to prevent nickel piping defects that can cause shorts in the source, drain and gate regions. They have also moved to SiGe to implement strain engineered device technologies. Traditionally the salicide process has used chlorine based chemistries to remove unreacted platinum metal after the formation of the silicide, however, these chemistries have demonstrated insufficient selectivity to silicide formed with low-temperature annealing. Chlorine also has the potential to damage SiGe. UMC evaluated the ZETA® System ViPR™ process as part of their effort to find a non-chlorine based alternative for metal stripping.
Typically, processes based on sulfuric acid and hydrogen peroxide mixtures (SPM) are not effective for platinum removal. However, if the platinum is dispersed, as with current NiPt salicide technology, and the SPM is at a high temperature, platinum removal can be achieved. The ZETA® System ViPR™ process employs point-of-use (POU) SPM mixing to take advantage of the exothermic SPM mixing reaction. To reach even higher on-wafer temperature the ViPR™ process pre-heats sulfuric acid to 150°C before POU mixing with hydrogen peroxide. These features of the ViPR™ process make it capable of achieving high reactivity with on-wafer temperatures approaching 200°C.
UMC evaluated the ZETA® System ViPR™ SPM process at three different temperatures: low, higher (optimized by adjusting mixing proportions only) and highest (increased by preheating the chemicals). As anticipated, the low temperature case left unacceptable metal residues, however, at elevated temperatures the metal was completely removed and process times were reduced relative to the chlorine-based baseline process, 33% for the higher temperature case and 66% for the highest temperature. The SPM processes did not damage the silicide (Fig 1) and resulted in sheet resistance measurements that were both lower and more tightly distributed (Fig 2), with the highest temperature case yielding the best sheet resistance performance. Equally important, the SPM processes were found to cause no damage to the SiGe structures. They concluded that high temperature, fresh dispense SPM-only process is effective to strip non-reacted NiPt for 45nm CMOS with SiGe structures and worthy of evaluation at the 32nm node.
Figure 1: Images showing damage to silicide caused by chlorine based chemistries (left) and absence of damage with SPM.
Figure 2: Sheet resistance measurements for the SPM process showed lower, tighter distributions than chlorine based chemistry.
FSI customers may order the UMC presentation and other presentations from the FSI 2008 Asia Knowledge Seminar Series on the FSI Website.
