The ZETA® Spray Cleaning Systems with ViPR™ technology deliver the highest performance and lowest cost solution for resist, silicide and general film stripping needs. Unlike other competing technologies, ZETA® systems with ViPR™ technology provide breakthrough improvements across a wide spectrum of front-end wet processing applications. ViPR™ technology delivers dramatic productivity improvements in resist stripping, which can be done ash-free, and for silicide integration where device yield improvements are obtained. The ZETA® system has extensive manufacturing experience and customers benefit from its overall productivity and efficiency improvements.
Benefits
- Eliminates ashers for more implant levels than competing techniques and replaces three step (wet clean-ash-wet clean) sequence for removing PLAD implanted photoresist
- Less material loss
- Reduces capital investment
- Shortens cycle time due to step elimination
- Eliminates asher-related device degradation
- Highest selectivity silicide strip process with lowest residual metal contamination
- Enables low temperature annealing for nickel platinum silicide formation
- Economical solution for wafer reclaim
News
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Reclaiming Test Wafers in ZETA® Spray Tool Can Save Millions
- FEOL Critical Clean and Etch
- FEOL Strip and Clean
- MOL Strip and Clean
- BEOL Strip and Clean
- Defect Removal
OTS (February 2007) -- Internal recycling of test wafers using FSI’s ZETA® spray processor can save millions of dollars compared to the cost of new wafers or externally reclaimed wafers. A high volume production fab may consume 500 to 1000 test wafers every day. With new 300mm wafers costing about $200 each, the cost of test wafers is very significant. 200,000 new wafers per year—548 wafers per day—cost $40 million. Most manufacturers mitigate this cost by recycling wafers, usually through a third party reclaim service. Reclaimed wafers from these services are usually about half the cost of new wafers.
MoreControlling Dissolved Oxygen in Cleaning Processes
OTS (September 2008) -- Dissolved gases have long been known to have significant impact on wet cleaning processes. Dissolved oxygen in rinse water contributes to surface oxidation and watermark formation during wafer drying [1-2]. Dissolved gases can affect megasonics processes and are often controlled in order to optimize particle removal efficiency and prevent pattern damage [3]. In addition, dissolved CO2 is well-known to form carbonic acid, affecting the pH of liquid cleaning solutions. More recently, there is an increased concern about the effect of dissolved oxygen when cleaning surfaces with different metals exposed.
MoreZETA® System Improves Cobalt Salicide Process Yields for Numonyx
OTS (September 2008) -- At FSI’s recent Knowledge Services™ Seminar series Enrico Bellandi described the success he and his colleagues at Numonyx had in reducing the defectivity and improving the yield of their cobalt salicide process using the ZETA® spray cleaning system. Reduction of contact and gate conductor resistance through self-aligned silicide formation, also known as “salicide,” is a well-known integrated circuit manufacturing module. A critical step in this module is the selective removal of unreacted metal after the silicide is formed by an annealing step. For flash memory manufacturing it is especially critical to remove any residual metal from the nitride spacer on the side of the gate stack.
MoreSTMicroelectronics Describes ZETA® System ViPR™ Process in Metal Stripping for Nickel Platinum Silicide
OTS (September 2008) -- At the recent FSI Knowledge Services™ Seminar series Stephane Zoll and Bruno Imbert of STMicroelectronics described challenges and solutions of metal stripping for nickel platinum (NiPt) salicide formation using a process based on FSI’s ZETA® System ViPR™ technology. The process leverages the FSI’s proprietary high temperature capabilities to strip unreacted NiPt with a sulfuric acid/hydrogen peroxide chemistry. This process is able to strip the unreacted Ni and residual Pt while avoiding the parasitic oxidation seen when chlorine based chemistries are used on NiPt silicides annealed at low temperatures. By enabling low temperature annealing, the new method solves a critical problem in the integration of NiPt silicides at the 45 nm technology node.
MoreFSI co-authors paper at the 17th International Conference on Ion Implantation Technology
OTS (September 2008) -- FSI co-authors paper at the 17th International Conference on Ion Implantation Technology (IIT 2008) in Monterey, California, June 8-13, 2008
The International Conference on Ion Implantation Technology is held every two years at different locations around the world. This Conference Series is the premier world meeting for the presentation of the latest advances in all aspects of ion implantation. The Conference consists of invited presentations as well as selected contributed presentations and posters.
MoreApprecia Technology, Inc. presents at the Electronic Journal 186th Technical Symposium
OTS (September 2008) -- Apprecia Technology, Inc. presents at the Electronic Journal 186th Technical Symposium - Exhaustive Study for 2008 ULSI Surface Cleaning and Drying Technology - in Tokyo, August 28, 2008
Electronic Journal in Japan sponsors many technical symposia. Each year one of the symposia is focused on cleaning technology in IC manufacturing. In 2008, the focus of this symposium was on cleaning challenges for 45nm and 32nm technology generations.
MoreResist Removal Walks a Tightrope
At the 32 nm technology node and beyond, the most critical front-end-of-line (FEOL) cleans are during ultrashallow junction (USJ) formation, with an International Technology Roadmap for Semiconductors' (ITRS) target of 0.3 Å/clean of silicon loss. Meeting this challenge is most difficult for resist removal following high-dose implants.
Increasing Demands Require New Look at Wafer Cleans
As device structures scale down, it is getting increasingly difficult to achieve low material loss while still removing particles. It is also getting more difficult to keep from damaging, attacking or otherwise modifying surrounding materials and structures — including doped silicon loss, changes in the k values of low-k dielectrics, metal gate corrosion, pattern collapse, and more.
MoreFSI Sponsors and Presents at the 2008 9th International Symposium on Ultra Clean Processing of Semiconductor Surfaces
OTS (September 2008) -- The Symposium on Ultra Clean Processing of Semiconductor Surfaces (UCPSS) objective is to increase the level of understanding on ultra-clean processing technology in all steps of IC-production.
The conference, which was held September 21-24 in Bruges, Belgium, included invited presentations as well as selected contributing presentations and posters.
MoreFSI was a Proud Sponsor of the 5th Semiconductor International China Wafer Cleaning Seminar Held 15 October 2008 in Shanghai
OTS (September 2008) -- The The SI China conference theme was Applications and Challenges in Cleaning Technology at the Age of Deep Submicron and emphasized practical and next-generation technologies, including:
More
ZETA® Spray Cleaning System’s ViPR™ Process for Metal Silicide Stripping Reduces Cost, Increases Throughput and Enables Low Temperature NiPtSi Anneal
OTS (February 2008) -- In parallel to the advancements made in ashless resist stripping using ZETA® system ViPR™ process, FSI now offers the HCl free ViPR™ process for metal silicide stripping (see FSI press release “FSI International Announces Breakthrough in Metal Stripping for Silicide Formation”). In collaboration with several customers, FSI has optimized the ViPR™ baseline process for rapid stripping of cobalt and nickel-platinum alloy metals used for salicide formation.
FSI Presents Advanced Cobalt Stripping Process for High Yield Salicide Formation
OTS (July 2006) -- At the conference, Dr. Charles Lin, FSI Asia director of product management, was pleased to present the paper Advanced Cobalt Stripping Process for High Yield Salicide Formation.
MoreZETA® Batch Spray System
The ZETA® Spray Cleaning Systems with ViPR™ technology deliver the highest performance and lowest cost solution for resist, silicide and general film stripping needs. Unlike other competing technologies, ZETA® systems with ViPR™ technology provide breakthrough improvements across a wide spectrum of front-end wet processing applications. ViPR™ technology delivers dramatic productivity improvements in resist stripping, which can be done ash-free, and for silicide integration where device yield improvements are obtained. The ZETA® system has extensive manufacturing experience and customers benefit from its overall productivity and efficiency improvements.
FSI International’s ZETA® System ViPR™ Process Identified as a Key Technology for Ultra-High Dose Ion Implantation in CMOS Applications
MINNEAPOLIS (June 17, 2008) -- FSI International, Inc. (Nasdaq: FSII) announced today that a paper jointly presented by Hynix Semiconductor, Inc.; Varian Semiconductor Equipment Associates, Inc.; Nanometrics Incorporated and FSI identifies the ZETA® Spray Cleaning System with ViPR™ technology as a key step in the integration of ultra-high dose PLAD (plasma doping) ion implantation. The paper was presented at the 17th International Conference on Ion Implantation Technology held June 8-13, 2008, in Monterey, California. The ViPR process is uniquely-capable of removing photoresist hardened by exposure to high-dose ion bombardment without the surface damage and material loss caused by traditional techniques.
MoreFSI International Receives Multiple ZETA® Spray Cleaning System Orders with ViPR™ Technology for Wet Resist Stripping and Metal Film Etching after Salicide Formation
MINNEAPOLIS (April 15, 2008) -- FSI International, Inc. (Nasdaq: FSII), a leading manufacturer of wafer cleaning systems used in the fabrication of integrated circuits, announced today that it has received orders for its ZETA® spray cleaning systems with ViPR™ technology from customers in Korea, Japan and Europe. These purchases are from new users of FSI’s ViPR process and demonstrate the growing adoption of this innovative solution, driven by its ability to address critical advanced IC manufacturing cost and integration concerns during photoresist stripping and salicide formation. The systems are scheduled to ship in the third quarter of fiscal 2008.
MoreNAND Flash Driving Technology Roadmaps
OTS (February 2008) -- Jeff Butterbaugh, chief technologist for FSI International, focuses his “Hot Topic” article on NAND Flash technology and findings from a recent ITRS public conference during Semicon Japan.
ZETA® Spray Cleaning System’s ViPR™ Process for Ashless Photoresist Stripping Reduces Material Loss and Chemical Costs While Improving Throughput
OTS (February 2008) -- In the latest generation ZETA® system, the new ViPR™ process now offers two recipe types ViPR™ and ViPR™+. The new ViPR™ technology further improves the established ViPR™ process by optimizing conditions to achieve the highest stripping levels with the lowest possible material loss. This is critical for both Logic and DRAM manufacturers.
MoreFSI Presents on the Financial Benefits of All-Wet Photoresist Removal for 200mm in Wuxi, China
OTS (February 2008) -- At the November 2007 China IC Industry Development Conference in Wuxi, China, James Chu, FSI field application engineering manager for SE Asia and Great China presented the “The Financial Benefits of All Wet Photoresist Removal for 200mm.”
MoreFSI Presents Papers on Yield Improvement Using Cryogenic Aerosol for BEOL Defect Removal and Wet Resist Strip Capability vs. Implant Energy at ECS
OTS (February 2008) -- FSI presented at the 10th International Symposium on Cleaning and Surface Conditioning Technology in Semiconductor Device Manufacturing at the October 2007, Electrochemical Society Meeting in Washington, D.C.
MoreFSI Presents the Advantages of Batch Spray Processing for Superior All-Wet Photoresist Stripping and Film Removal in China and Korea
OTS (February 2008) -- “Batch Spray processing for Superior Photoresist Stripping and Film Removal process” was presented at the August 2007 SI China Wafer Cleaning Seminar in Shanghai, China, by James Chu, FSI field application engineering manager for SE Asia and Great China; and at the September 2007, 6th Korean Surface Cleaning Users Group meeting in Seoul, Korea, by Andy Lee, FSI spray applications section manager.
MoreFSI International Announces Breakthrough in Metal Stripping for Silicide Formation
MINNEAPOLIS (December 11, 2007) -- FSI International, Inc. (Nasdaq: FSII) today announced it has adapted the FSI ViPR™ technology to successfully remove unreacted metal films after salicide formation. By implementing this new process, IC makers can achieve dramatic reductions in chemical usage and capital requirements for cobalt, nickel and nickel platinum silicide integration schemes. FSI ViPR™ technology is available on new FSI ZETA® Spray Cleaning System orders and as an upgrade to more recently installed systems in the field.
MoreAll-wet stripping of high dose implanted photoresist qualified and in production
OTS (July 2007) -- All-wet stripping of high dose implanted photoresist qualified and in production
Jeffery W. Butterbaugh, FSI International Chief Technologist
All-wet resist stripping has been a major focus of cleaning equipment suppliers for the past two years. The desire by IC manufacturers for all-wet photoresist stripping is driven by a need to decrease material loss and eliminate the side effects of plasma ashing during the photoresist stripping process.
MoreSamsung Presents Results of ViPR™ Process Joint Development Project
OTS (July 2007) -- At the April FSI Knowledge Services™ Seminar held in Seoul, Korea, Mr. Kwang Wook Lee of Samsung Electronics presented the results of a year-long joint development project to evaluate and improve the performance of FSI’s ViPR™ all wet stripping process on photoresist used in high dose implant processes. The JDP focused on plasma doping applications and successfully qualified the ViPR™ process for increased stripping capability, reduced material loss, and better electrical characteristics.
MoreITRS Timing Adjustments Affect New Surface Preparation Requirements
OTS (February 2007)
MoreFSI’s ViPR™ Process Production Qualified by Major Semiconductor Manufacturer
OTS (November 2006) -- FSI’s new ViPR™ process running on the ZETA® G3 platform is being used in several fabs of a major Asian semiconductor manufacturer. This represents rapid and significant progress in the acceptance of the ViPR™ process since our last report three months ago when it was still in the initial stages of a multi-tiered qualification process.
MoreZETA® G3 Spray Cleaning System Accepted and in Production Qualification
OTS (July 2006) -- The first ZETA® G3 spray cleaning systems, shipped March 2006, have been accepted and are in the process of production qualification. The ZETA G3 is the third generation on the ZETA platform.
MoreFSI Introduces New ViPR™ Technology for Ash-Free, Wet Resist Stripping Technology Available on ZETA® G3 Spray Cleaning Platform
MINNEAPOLIS (March 20, 2006) -- FSI International, Inc. (Nasdaq: FSII) today introduced its new ViPR™ technology. This innovative technology eliminates the need for ashing on most implanted photoresist stripping steps, including 1x1017 ions/cm2 plasma doped (PLAD) photoresist. The ViPR technology is available on FSI’s ZETA® G3 Spray Cleaning Platform.
MoreCleaning with Low Material Loss Requires an Integrated Approach
OTS (February 2006) -- Jeffery W. Butterbaugh, FSI International Chief Technologist
Over the past few years, a large portion of the research and development in cleaning processes has focused on achieving high-efficiency particle removal while minimizing damage and material loss.
MoreFSI International Successfully Implements Its PlatNiStrip™ Process at Leading IC Makers for 65nm Production
MINNEAPOLIS (Feb. 7, 2006) -- FSI International, Inc. (Nasdaq: FSII) today announced that its nickel-platinum strip process, the PlatNiStrip™, has been qualified and implemented by several of the world’s largest IC makers for manufacturing 65nm technology devices. FSI’s PlatNiStrip process, designed to provide IC makers with a manufacturing solution for advanced salicide formation, is gaining broader industry adoption.
MoreFSI International Launches the EcoBlend™ Process Series of Cost-Effective Dilute Acid Cleaning Solutions for Post-Ash Residue Removal
MINNEAPOLIS (August 2, 2005) -- FSI International, Inc. (Nasdaq: FSII) today announced a new family of dilute acid cleans, called the EcoBlend™ Processes, for cost-effective and environmentally friendly removal of post-ash residues. Used for aluminum and tungsten interconnect cleaning applications, this family of chemical processes gives IC manufacturers alternatives to high-cost specialty chemicals.
MoreFSI International Introduces New Cleaning Processes for Advanced Technology Nodes New Processes Meet Customer Needs Well Ahead of ITRS Schedule
MINNEAPOLIS (June 30, 2005) -- FSI International, Inc. (Nasdaq: FSII) today announced new cleaning processes to meet the needs of leading IC makers well ahead of the International Technology Roadmap for Semiconductors (ITRS) guidelines for material loss. The ITRS calls for a maximum material loss per cleaning cycle of 0.4 angstrom at the 45nm technology node, while semiconductor manufacturers indicate their requirements are closer to 0.1 angstrom.
MoreFSI International Announces New PlatNiStrip™ Process for Nickel Platinum Films; Development to Help IC Manufacturers Implement Salicide Formation at 65-nm
MINNEAPOLIS (Mar. 14, 2005) -- FSI International, Inc. (Nasdaq: FSII) today announced the development of a new nickel-platinum strip process designed to help IC manufacturers implement salicide formation at the 65-nm technology node. FSI has developed the PlatNiStrip™ process using the FSI ZETA® Spray Cleaning System and has partnered with leading IC makers to demonstrate the process on 65-nm pilot line devices. This low-cost process can be implemented with industry standard chemicals on a standard ZETA System.
MoreFSI Receives Follow-on Order from Asian Foundry for ZETA® Spray Cleaning System
MINNEAPOLIS (Mar. 8, 2005) -- FSI International, Inc. (Nasdaq: FSII) today announced that it continues to see strong acceptance of its spray cleaning technology in Asia, as evidenced by a repeat order for its ZETA® Spray Cleaning System from an Asian foundry customer.
MoreFSI International Awarded U.S. Patent on Method for Etching High-k Films for Advanced Technology Nodes
MINNEAPOLIS (Feb. 15, 2005) -- FSI International, Inc. (Nasdaq: FSII), a manufacturer of capital equipment for the microelectronics industry, today announced that the U.S. Patent and Trademark Office has awarded the company a patent for a new process to etch high dielectric constant (high-k) films with high selectivity. The new process, which will be used at the 45-nm node and below, enables wet etching of high-k films – something not possible with traditional dielectric wet etch techniques.
MoreFSI International Receives Follow On Orders From International Customers For Its ZETA® Spray Cleaning System
MINNEAPOLIS (Dec. 21, 2004) -- FSI International, Inc. (Nasdaq: FSII) today announced that the company has received repeat orders for its 300-mm ZETA® Spray Cleaning System. The repeat order from a leading IC manufacturer based in Taiwan will be used for front-end-of-line (FEOL) surface preparation at the 90-nm technology node and the ZETA System ordered by a major microprocessor manufacturer will be used for back end applications.
MoreFSI International Surface Preparation Products Gain Momentum in Asia
MINNEAPOLIS (September 14, 2004) -- FSI International, Inc. (Nasdaq: FSII) today announced that its surface preparation technology platforms are experiencing broad adoption in Asia, with sales to customers in the region accounting for nearly 40 percent of all orders in the first nine months of fiscal year 2004, up from 11 percent in the first nine months of fiscal 2003.
MoreFSI Joins Damascus™ Alliance to Integrate Cleaning into the Copper Dual Damascene Process
MINNEAPOLIS (May 11, 2004) -- FSI International, Inc. (Nasdaq: FSII) today announced that the company has signed a cooperative agreement with Novellus Systems, Inc. to join the Damascus Alliance™, a group of semiconductor equipment companies that collaborate on copper dual damascene process integration for advanced device manufacturing. FSI will install their fully automated 300-mm ZETA® Spray Cleaning System in the Novellus Customer Integration Center (CIC) in July. FSI’s expertise in the areas of post via etch, post trench etch, post barrier etch cleaning and other surface conditioning processes for use in copper and low k dual damascene processing compliments the expertise of other Alliance members.
MoreFSI International Receives Multiple ZETA® System Orders From Leading Global Integrated Circuit Manufacturers
MINNEAPOLIS (March 10, 2004) -- FSI International, Inc. (Nasdaq: FSII) today announced that during the second fiscal quarter the company received orders for multiple 200- and 300-mm ZETA® Spray Cleaning Systems from leading semiconductor manufacturers.
MorePublications
“Wet Resist Strip Capability vs. Implant Energy”
By: Kurt K. Christenson, FSI International
Implant doses greater than 5E14 atoms/cm2 can create an amorphous carbon like damage layer (crust) that is difficult to dissolve with wet chemistries.
Request Article“All Wet Stripping of Implanted Photoresist”
By: Kurt K. Christenson, Jeffery W. Butterbaugh, Thomas J. Wagener, Nam Pyo Lee, Brent Schwab, Michael Fussy, John Diedrick, FSI International
A new all-wet piranha-based process capable of reaching 200°C on-wafer temperatures has been demonstrated for stripping implanted photoresist.
Request Article“A High-Temperature Batch-Spray Process for Implanted Resist Stripping”
By: Jeffery Butterbaugh, Kurt Christenson and Nam Pyo Lee
Photoresist stripping in IC manufacturing has become more challenging as the number of photoresist levels has increased, while at the same time allowable material loss and surface damage has decreased. Heavily implanted photoresist is especially challenging due to the dehydrogentated, amorphous carbon layer that forms on the surface.
Request Article"Reducing Time in Batch Cleaning"
By: Jeffrey Butterbaugh, FSI International
Wafer cleaning represents up to 15% of the total process steps to build an advanced, 90-nm semiconductor device and is still mainly carried out in batch processes. Performance and throughput advantages are the main reasons for the persistence of batch processing in cleaning. However, concerns about cycle time are driving development of single wafer cleaning processes. Jeffery W. Butterbaugh of FSI International looks at alternatives for maintaining performance and throughput while realizing gains in productivity for cleaning processes.
“Using Cost-Effective Dilute-Acid Chemicals to Perform Postetch Interconnect Cleans”
By: Hong-Seong Sohn, Samsung Electronics; and Jeffery W. Butterbaugh, Erik D. Olson, John Diedrick, and Nam-Pyo Lee
Request ArticleThe Litmus Test ’Selective Etching of High-k Dielectric Films’
By Kurt Christenson, FSI International
Request Article“Non-Damaging Chemical Photoresist Strip Process for Copper Low-k Interconnects”
By: Philip G. Clark and Kurt Christenson
Request Article“Non-Damaging Cleaning Processes for Porous Low-k Materials”
By: Philip G. Clark and Darren L. Moore
Photoresist removal using traditional plasma ash chemistries leads to severe degradation of low-k dielectric properties including increases in k-value and changes in critical dimensions. We present a new process using ozone-saturated, deionized water (DIO3) in a batch spray processor.
Request Article"Rinsing: A Critical Process in Particle Removal"
By: Kurt Christenson
Rinsing is a critical process in particle removal. This paper examines fundamental mechanisms of rinsing and applies these principals to the development of ramped rinsing in spray cleaning. Results include better particle removal and reduced water consumption.
"Batch Spray Processors: Reducing Cycle Time, Improving Performance"
By: Erik Olson
Through rinse optimization, we have developed the FlashClean™ Advantage package for the ZETA® Spray Cleaning System. As shown in our work and at Texas Instruments production facility, the FlashClean™ Advantage not only produces manufacturing advantages of reduced cycle time and chemical and water consumption but also improves particle performance for the 65nm technology node. The benefits are widely applicable to all spray applications.
“Rapid and Controlled Stripping of Thick Resists for Semiconductor BEOL Applications”
Request Article“Better Repeatability Through Automated Etch Control”
By: Jerry Zhao (ASMC) and Mark Ge (FSI)
For customers using spray processors for pre-diffusion clean, the FSI Etch Control option automatically controls the length of etch steps by measuring and adjusting for concentration of the etchant and wafer temperature. For the oxide loss target of 105Å, ASMC achieved reduction of the standard deviation from 6.76Å to 2.10Å, and of the repeatability deviation from 6.45% to 1.99%.
Request Article"Characterizing Etch Residue Removal for Batch Processing of Spin-On Low-k Dielectric Materials"
Spin-on low-k dielectric materials, including SiLK and MSQ, are being integrated into BEOL Cu interconnect structures. Post-etch residue removal must selectively dissolve the organometallics without attacking the low-k or Cu film. We demonstrate such a substrate-safe stripper, GenSolve 670, in a batch spray system. A complete cycle time of 30 minutes is possible, providing a throughput near 200 wph.
“Selective Etching of High-k”
Solid State Technology Web Exclusive
The deposition of blanket films with a subsequent etch after gate patterning remains the leading candidate for integrating high-k gate dielectrics at the 70nm node.
Request Article"Improved Post-etch Via Clean with Fluoride-based Semi-aqueous Chemistry using an Intermediate Rinse"
By: Jeffrey W. Butterbaugh
“An Integrated Wet Chemical Etch-Strip-Clean Sequence,” Solid State Technology
An investigation was conducted to determine the source of a yield-limiting defect identified on all product types at a wafer fab. The defect was isolated to patterning operations in the frontend section of the device process where a conventional multistep sequence was used. The problem was traced to a wet chemical buffered oxide etching step and attributed to drying wafers before ashing the resist film.
Request Article