Jeffery W. Butterbaugh, FSI International Chief Technologist

All-wet resist stripping has been a major focus of cleaning equipment suppliers for the past two years. The desire by IC manufacturers for all-wet photoresist stripping is driven by a need to decrease material loss and eliminate the side effects of plasma ashing during the photoresist stripping process.

This desire has been heightened by the smaller dimensions and the shallower dopant profiles of the industry’s most advanced transistors, while at the same time the number of implant masking steps has increased as IC manufacturers build a more diverse array of transistor types on the same chip. A typical 65nm logic device can have 13 implant masking steps, with about half coming after gate formation where the sensitivity to material loss is most critical. In addition, the use of plasma immersion implanting for counter-doped dual poly gate (DPG) formation in DRAM manufacturing has also driven the need for all-wet photoresist stripping.

While traditional wet bench piranha processes operating at 130°C have been sufficient to strip photoresist exposed to lower dose and lower energy implants, they are ineffective for many of the post-gate formation implants which have doses greater than 1x10¹⁴ ions/cm2 and energies greater than 10 keV. These higher dose implant masks have required plasma ashing in order to remove the amorphous carbon crust layer that forms on the photoresist surface. Plasma immersion implant processes are typically used for lower energy implantation, <10keV, at much higher doses, >1x10¹⁷ ions/cm², and can leave a thin deposited layer. Plasma immersion implant masks have required a wet stripping step for removing this deposited layer prior to the plasma ashing step. All of the plasma ashing processes have required a final wet cleaning step to remove ash residues.

FSI’s ViPR™ Process is a significant improvement over traditional wet bench piranha processes and provides the ability to strip photoresist that has been exposed to beamline implant conditions of 3x10¹⁵ As ions/cm² at 10 keV, typical of an LDD implant, eliminating the need for plasma ashing. In addition, this new process can replace the 3-step, wet-ash-wet sequence needed for stripping plasma immersion implant exposed photoresist with just a single wet process. In the recently concluded FSI Knowledge Services™ Seminar 2007 Asia Seminar Series, Samsung showed how implementing the ViPR™ process in their DRAM pilot line using plasma immersion implant for DPG formation cut their polysilicon loss in half and reduced their dopant loss from 35% (with the 3-step process) to less than 25%. (For Samsung ViPR™ results using the FSI ZETA^® System click here.) The ViPR™ process has also been qualified for all-wet stripping of most beamline implanted photoresist masks.

It is expected that more all-wet photoresist stripping for implant masks will be implemented on 45nm technology devices and that this process will become enabling for manufacture of the most advanced semiconductor devices.

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