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FSI's New ORION® Single Wafer Cleaning System Enabling Critical Path Cleaning for 32 and 22nm Technologies

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Hot Topic

IC Industry Moving to Paradigm of High-k/Metal Gates and Shallower Junctions

With the recent publication of the 2008 ITRS update, and papers given at the latest IEDM Conference[1-5] it is clear that the broader integrated circuit (IC) industry is boldly moving into the paradigm of high-k/metal gate (HKMG) logic devices. In addition, the ITRS indicates junction depths for source/drain extensions continue to decrease as gate length continues to scale. These two trends drive key surface preparation challenges.

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FSI in the News

FSI International Releases ORION® Single Wafer Cleaning System

Innovative closed-chamber design enables critical path cleaning capabilities for ultra shallow junctions, high-k/metal gates and metal capping layers at 32nm and below.

FSI announced today the release of its new ORION® Single Wafer Cleaning System. The system’s unique closed chamber design permits complete control and containment of the wafer environment, addressing several cleaning-related issues on the critical path for 32nm and 22nm technologies. These include the reduction of material loss during photoresist stripping after ultra shallow implants and the elimination of material loss and galvanic corrosion in high-k metal gates and copper interconnects with metal containing capping layers.

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  Related ORION® System News
 
FSI International Announces the ZETA® Spray Cleaning System with ViPR™ Technology is Now Qualified for 200mm Manufacturing

ViPR™ technology eliminates ashing for highly implanted photoresist and improves yields for metal stripping following salicide processes.

FSI announced that its FSI ZETA® spray cleaning system with ViPR™ technology is now available for 200mm wafer processing, and an Asian customer has qualified this technology for their 200mm manufacturing. FSI’s ViPR technology, originally introduced for 300mm advanced technologies, has been adopted by several 300mm fabs because of its ability to successfully strip highly implanted photoresist with a one-step wet process. In response to 200mm fabs wanting the same benefits, FSI developed the ViPR capability on its 200mm ZETA system. ViPR technology makes it possible for IC manufacturers to leverage cost and cycle time reduction by eliminating ashers and multi-step ash-wet methods, to free up space for other enabling technologies.

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Product Updates

FSI’s NEW ORION® Single Wafer Cleaning System Officially Takes Off

On November 3, 2008, FSI officially entered the single wafer wet cleaning market with the ORION® System. In recent years IC manufacturers have been asking FSI for single wafer cleaning solutions -- FSI responded with the ORION® system. The ORION® system with its differentiated solutions is already providing unique critical path capabilities required for advanced technology nodes as reflected by orders received shortly after its launch.

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UMC Validates the ZETA® System ViPR™ Technology for NiPt Silicide Process on Silicon-Germanium (SiGe)

At the recent FSI Knowledge Services™ Seminar Series in Asia, UMC presented compelling data using FSI’s ZETA® System ViPR™ process for the removal of unreacted metal in a nickel platinum (NiPt) self aligned silicide process on strained silicon germanium devices. UMC asserted that FSI’s ZETA® System ViPR™ technology is fully compatible with SiGe, and the technology has excellent selectivity and does not attack the low temp annealed silicides like chlorine based solutions.

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ZETA® System ViPR™ Photoresist Stripping Process Dramatically Reduces Cycle Time in 200mm Production at MagnaChip Semiconductor

At FSI’s recent FSI Knowledge Services™ Seminar held in Asia, representatives of MagnaChip described their experience with the ZETA® System ViPR™ photoresist stripping process in a 200mm production fab, attributing it to reductions in cycle time by as much as 11x over the ash and clean process of record. Their analysis demonstrated a cumulative time savings over many layers in one product amounting to 10% of total processing time.

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ANTARES® System Auto Dewar Drain Upgrade Saves Time and Labor

An Auto Dewar Drain upgrade now available for ANTARES® Cryokinetic Cleaning Systems automatically drains liquid nitrogen from the dewar as required during scheduled maintenance or to clear blockages caused by material freezing in the coil or nozzle during routine operations. Automation simplifies the procedure by eliminating the need to manually change hardware, saves time otherwise required to verify draining, and improves reliability by providing positive confirmation that the dewar and coil have reached a temperature high enough to melt and clear any blocking material.

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Customer Care News

FSI Holds a Tremendously Successful Knowledge Services™ Seminar Series in ASIA

FSI has been working with the leading IC manufacturers around the world to generate world class innovations using FSI tools and processes. The November 2008 FSI Knowledge Services™ Seminar Series (KSS) in ASIA proved to be the perfect platform for Asia-based IC manufacturers to learn about these latest innovations. Customer and FSI findings were presented to the largest crowd since the seminar series was launched in 2004; nearly 500 customers attended sessions held in Shanghai, Seoul, Singapore, Hsinchu and Taichung.

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New Publications

FEOL Strip and Clean

“Steam-Injected SPM Process for All-Wet Stripping of Implanted Photoresist,” presented at the Ultra Clean Processing of Semiconductor Surfaces (UCPSS), September 2008

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MOL Strip and Clean

“Advances on 45nm SiGe-Compatible NiPt Salicide Process,” presented at the Ultra Clean Processing of Semiconductor Surfaces (UCPSS), September 2008

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FEOL Critical Clean and Etch, FEOL Strip and Clean and MOL Strip and Clean

“Front End Processes,” published in Future Fab, January 2009

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Please visit the FSI Technical Library to view the latest papers available on FSI technologies.

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Looking Ahead

SEMATECH Surface Preparation and Cleaning Conference

FSI is an Executive Sponsor of the SEMATECH Surface Preparation Cleaning Conference “Emerging Technologies in Semiconductor Surface Preparation” and will present several papers on its advanced cleaning capabilities.

Date: March 23-25, 2009
Place: Sheraton Hotel, Austin, TX

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MRS 2009 Spring Meeting

FSI is an Executive Sponsor of the SEMATECH Surface Preparation Cleaning Conference “Emerging Technologies in Semiconductor Surface Preparation” and will present several papers on its advanced cleaning capabilities.

FSI is a Proud Sponsor of the MRS Spring Meeting “Symposium C – CMOS Gate-Stack Scaling-Materials, Interfaces and Reliability Implications”

Date: April 13-16, 2009
Place: Moscone West and San Francisco Marriott, San Francisco, CA

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