OTS (February 2006) -- The in-line DC parametric test step provides an intra-flow device measurement (typically at the first metal level) of the chip's vital parametric performance. As BEOL metallization steps become more complex and manufacturing costs rise, testing becomes even more important.

Device manufacturers want to know that the FEOL transistors they are processing meet specifications before committing to the rest of the BEOL process steps.

The test step is considered destructive because it takes a sample wafer off the manufacturing line and passes it through the electrical test area. Probe card pins mechanically contact the test wafers, which can physically abrade the wafer's measurement pads and cause localized particle contamination. The testing areas may also be located away from the primary manufacturing lines, in lower-class clean room environments, subjecting the test wafers to falling airborne particulate contamination.

While the test sampling strategy varies from manufacturer to manufacturer, most IC makers that test will commit a minimum of one wafer for testing. The committed wafer ends up as 100% scrapped, which equates to a built-in 4% scrap rate for a 25-wafer process lot. Consider a 20,000-wafer-start fab that samples every lot. This translates to a substantial number of scrapped wafers – and lost revenue – every month.

Ideally the manufacturer would like to complete the fabrication of the tested wafers, but traditional cleaning methods use corrosive oxidizing chemistries that are not compatible with the exposed copper commonly found in advanced logic devices. The ANTARES^® CryoKinetic Cleaning system utilizes dry, inert argon and nitrogen gases, making it immediately compatible with exposed copper. The ANTARES^® system cleans with great efficiency by projecting a high-velocity mixture of frozen argon and nitrogen at the wafer surface to remove the debris left by test probes.

Several device manufacturers have discovered the unique advantages of the CryoKinetic clean and have adopted the ANTARES^® system – recovering wafers that were once lost. In some cases, customers are probing and cleaning every wafer within a lot, providing even more visibility into their manufacturing processes. These customers no longer need to decide between sacrificing wafers and losing valuable test data because the ANTARES^® system enables them to get both the parametric performance data and the full potential revenue from each wafer.

To learn more about the advantages of the ANTARES^® system and other application opportunities in the device flow, please contact your local FSI International account manager, or visit our website at www.fsi-intl.com.